A selective area epitaxy may be used to form III-V MOS devices on a silicon (Si) substrate. Generally, selective area epitaxy refers to the local growth of an epitaxial layer through a patterned dielectric mask that is deposited on a semiconductor substrate. However, defects are generated when the III-V materials are grown on the Si substrate. The defects are due to lattice mismatch between the III-V materials and the Si, as well as the non-polar to polar transition moving from the Si material to the III-V materials. These defects can reduce the mobility of carriers (e.g., electrons, holes, or both) in the III-V materials. Due to the defects, integration of III-V materials based devices, germanium based devices, or other lattice mismatched materials based devices onto a Si substrate for Complementary Metal-Oxide Semiconductor (“CMOS”) systems is difficult.